EE World Online

What are the benefits of RISC-V in AI, ML, and embedded systems?

The open-source nature of RISC-V brings the benefits of a modular and royalty-free instruction set architecture (ISA) that eliminates licensing fees, can accelerate development, and fosters ...
insideHPC

d-Matrix and Andes Collaborate on RISC-V Accelerator for AI Inference

ST. LOUIS (SC25) — Nov 17, 2025 – Generative AI inference compute company d-Matrix and Andes Technology , a supplier of RISC-V processor cores, announced that d-Matrix has selected the AndesCore ...
EDN

AI is stress-testing processor architectures and RISC-V fits the moment

RISC-V’s expanding role in AI is not a rejection of incumbent architectures, which continue to deliver performance and ...
Morningstar

d-Matrix and Andes Team on World's Highest Performing, Most Efficient Accelerator for AI Inference at Scale

Collaboration combines d-Matrix 3DIMC technology with Andes' high-performance RISC-V CPU IP for Raptor, d-Matrix's next-gen accelerator for blazing fast, sustainable AI inference The collaboration ...
EDN

The next RISC-V processor frontier: AI

The RISC-V Summit North America, held on 22-23 October 2025 in Santa Clara, California, showcased the latest CPU cores featuring new vector processors, high-speed interfaces, and peripheral subsystems ...
Morningstar

S2C, MachineWare, and Andes Introduce RISC-V Co-Emulation Solution to Accelerate Chip Development

SAN JOSE, Calif., Dec. 16, 2025 /PRNewswire/ -- S2C, MachineWare, and Andes Technology today announced a collaborative co-emulation solution designed to address the increasing complexity of ...
Design And Reuse

SEMIFIVE Partners with Niobium to Develop FHE Accelerator, Driving U.S. Market Expansion

Seoul, South Korea – SEMIFIVE, a leading global provider of custom AI semiconductor (ASIC) solutions, announced today that it has secured a design win from Niobium, a U.S.-based leader in Fully ...
Digi Times

Qualcomm, Google bet big on RISC-V for AI dominance

As AI drives demand for advanced computing infrastructure, chip architectures are at a crossroads. While proprietary instruction set architectures (ISAs) like x86 and Arm dominate the market, their ...
Digi Times

MIPS accelerates S8200 RISC-V NPU timeline

MIPS has accelerated the development timeline of its S8200 neural processing unit, a RISC-V–based NPU designed for real-time, low-latency edge AI, as the company continues to advance its strategy ...
Forbes

SiFive To Integrate Nvidia NVLink Fusion For Next-Gen AI Data Center Chips

Forbes contributors publish independent expert analyses and insights. Marco Chiappetta is a technologist who covers semiconductors and AI. This voice experience is generated by AI. Learn more. This ...
CRN

Qualcomm Acquires RISC-V Chip Designer Ventana To Boost CPU Efforts

The chip design giant says Ventana’s expertise in RISC-V, a free and open alternative to the Arm and x86 instruction set architectures, will enhance its CPU engineering capabilities and complement ...